<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="6.x">Drupal-Biblio</source-app><ref-type>47</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Wucherl Yoo</style></author><author><style face="normal" font="default" size="100%">Kevin Larson</style></author><author><style face="normal" font="default" size="100%">Sangkyum Kim</style></author><author><style face="normal" font="default" size="100%">Wonsun Ahn</style></author><author><style face="normal" font="default" size="100%">Roy H. Campbell</style></author><author><style face="normal" font="default" size="100%">Lee Baugh</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">Automated Fingerprinting of Performance Pathologies Using Performance Monitoring Units (PMUs)</style></title><secondary-title><style face="normal" font="default" size="100%">3rd USENIX Workshop on Hot Topics in Parallelism (HotPar '11)</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2011</style></year><pub-dates><date><style  face="normal" font="default" size="100%">05/2011</style></date></pub-dates></dates><urls><related-urls><url><style face="normal" font="default" size="100%">http://srg.cs.illinois.edu/srg/sites/default/files/Yoo.pdf</style></url></related-urls></urls><publisher><style face="normal" font="default" size="100%">USENIX</style></publisher><pub-location><style face="normal" font="default" size="100%">Berkeley, CA</style></pub-location><abstract><style face="normal" font="default" size="100%">Modern architectures provide access to many hardware
performance events, which are capable of providing insight
into architectural performance bottlenecks throughout
the core and memory hierarchy. These events can
provide programmers with unique and powerful insights
into the causes of performance problems in their programs,
but interpreting these events has been a significant
challenge. We describe a technique that uses data
mining to automatically fingerprint a program’s performance
problems, permitting programmers to reap the
architectural insights made possible by the events while
shielding them from the onerous task of interpreting raw
events. We use a decision tree algorithm on a set of
micro-benchmarks to construct a model of performance
problems. This extracted model is able to divide a
profiled application into program phases, and label the
phases with the patterns of hardware bottlenecks. Our
framework provides programmers with a detailed map
of what to optimize in their code, sparing them the need
to interpret raw events.</style></abstract></record></records></xml>